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BMEN90033 · Week 5

Class D Amplifier

Class D amplifiers take a completely different approach to amplification compared to their linear cousins (Class A, B, AB). Rather than controlling how much a transistor conducts, Class D switches transistors fully ON or fully OFF at high frequency. The result is typical efficiencies of 90–95%. This page walks through the concept step by step: how the PWM signal is generated, what it looks like, and how a low-pass filter recovers the original signal.

Part 01

The Input Signal

We start with an analog input signal, here a sine wave representing audio or a sensor reading.

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In a linear amplifier, this signal directly controls how much current flows through the transistor. In Class D, we use it differently: as a reference for switching.
Part 02

The Comparator: Generating PWM

At the heart of every Class D amplifier is a comparator. It takes the input signal on one terminal and a high-frequency triangle wave (the "carrier") on the other. Whenever the input sits above the carrier, the output goes HIGH. Whenever it falls below, the output goes LOW. The result is a pulse-width modulated (PWM) signal.

The waveforms below show this in action. The white trace is the input signal, the gold trace is the triangle carrier, and the coloured square wave is the resulting PWM output:

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Notice how the duty cycle (proportion of time spent HIGH) varies with the input signal. When the input is at its peak, the PWM is HIGH most of the time. When at its trough, it's LOW most of the time. At zero, it's a 50% duty cycle.
Duty Cycle = (Vin + Vcarrier,pk) / (2 × Vcarrier,pk)
Part 03

The Switching Stage: MOSFET Half-Bridge

The PWM signal drives a pair of complementary MOSFETs (NMOS and PMOS) arranged in a half-bridge. Unlike BJTs in linear amplifiers, these MOSFETs operate as digital switches: they are either fully ON or fully OFF, with nothing in between.

Because the MOSFETs are either fully on (RDS(on) ≈ milliohms, nearly zero voltage drop) or fully off (zero current), the power dissipated in the switches is almost zero. This is why Class D efficiency approaches 100%.
Pswitch ≈ 0   (VDS × ID ≈ 0 in both states)
Part 04

The LC Low-Pass Filter: Recovering the Signal

The PWM output is a high-frequency square wave that rapidly switches between VCC and GND. To recover the original analog signal, we pass it through an LC low-pass filter. The inductor resists rapid current changes, and the capacitor smooths the voltage. The filter's cutoff frequency is set above the signal bandwidth but well below the switching frequency.

The result: the high-frequency PWM is smoothed into a clean analog output. Compare the raw PWM (faint) with the filtered signal (bright green):

The LC filter averages the PWM signal. During HIGH periods, current flows through the inductor into the capacitor and load. During LOW periods, the inductor's stored energy maintains the current. The output voltage ends up proportional to the duty cycle, but it is not perfectly smooth. Try dragging the fsw/fsig slider above. At low ratios (5–10x), you can clearly see the switching ripple riding on top of the output. At high ratios (40x+), the ripple becomes negligible. A 2nd-order LC filter attenuates ripple by the ratio squared (−40 dB/decade).
fcutoff = 1 / (2π√(LC))   where   fsignal << fcutoff << fswitching
Part 05

Putting It All Together: Efficiency

Here is the complete Class D signal chain, from the input signal through the comparator, half-bridge, and LC filter to the output.

DC Input Power
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Signal Output Power
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Wasted as Heat
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η = 92%
Compare this to linear amplifiers: Class A ≈ 25%, Class B ≈ 78%, Class AB ≈ 55%. Class D achieves 90–95% by eliminating the transistor's linear region entirely.
Part 06

Why MOSFETs?

Class D needs transistors that switch fast with minimal loss. MOSFETs win over BJTs here for a few practical reasons:

Class D is the dominant amplifier topology in portable and battery-powered biomedical devices. Power efficiency directly determines battery life and how much heat the device generates, both of which are critical constraints in wearable and implantable systems.